UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 129

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

5.6.2 Example of controlling internal high-speed oscillation clock
(4) Example of setting procedure when stopping the high-speed system clock
The following describes examples of clock setting procedures for the following cases.
(1) When restarting oscillation of the internal high-speed oscillation clock
(2) When using internal high-speed oscillation clock as CPU clock, and internal high-speed oscillation clock or
(3) When stopping the internal high-speed oscillation clock
The high-speed system clock can be stopped in the following two ways.
(a) To execute a STOP instruction
(b) To stop X1 oscillation (disabling external clock input) by setting MSTOP to 1
high-speed system clock as peripheral hardware clock
Executing the STOP instruction to set the STOP mode
Setting MSTOP to 1 and stopping the X1 oscillation (disabling clock input if the external clock is used)
<1> Setting to stop peripheral hardware
<2> Setting the X1 clock oscillation stabilization time after standby release
<3> Executing the STOP instruction
<1> Confirming the CPU clock status (PCC and MCM registers)
<2> Stopping the high-speed system clock (MOC register)
Caution Be sure to confirm that MCS = 0 or CLS = 1 when setting MSTOP to 1. In addition, stop
CLS
0
0
1
Confirm with CLS and MCS that the CPU is operating on a clock other than the high-speed system
clock.
Stop peripheral hardware that cannot be used in the STOP mode (for peripheral hardware that
cannot be used in STOP mode, see CHAPTER 19 STANDBY FUNCTION).
When the CPU is operating on the X1 clock, set the value of the OSTS register before the STOP
instruction is executed.
When the STOP instruction is executed, the system is placed in the STOP mode and X1 oscillation
is stopped (the input of the external clock is disabled).
When CLS = 0 and MCS = 1, the high-speed system clock is supplied to the CPU, so change the
CPU clock to the subsystem clock or internal high-speed oscillation clock.
When MSTOP is set to 1, X1 oscillation is stopped (the input of the external clock is disabled).
peripheral hardware that is operating on the high-speed system clock.
MCS
0
1
Internal high-speed oscillation clock
High-speed system clock
Subsystem clock
CHAPTER 5 CLOCK GENERATOR
User’s Manual U18698EJ1V0UD
CPU Clock Status
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