UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 164

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

6.4.3 External event counter operation
up with the valid edge of the TI000 pin) and bits 3 and 2 (TMC003 and TMC002) of 16-bit timer mode control register
00 (TMC00) are set to 11, the valid edge of an external event input is counted, and a match interrupt signal indicating
matching between TM00 and CR000 (INTTM000) is generated.
external event counter in the clear & start mode entered by the TI000 pin valid edge input (when TMC003 and
TMC002 = 10).
the following timing.
is not detected until it is detected two times in a row. Therefore, a noise with a short pulse width can be eliminated.
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When bits 1 and 0 (PRM001 and PRM000) of the prescaler mode register 00 (PRM00) are set to 11 (for counting
To input the external event, the TI000 pin is used. Therefore, the timer/event counter cannot be used as an
The INTTM000 signal is generated with the following timing.
However, the first match interrupt immediately after the timer/event counter has started operating is generated with
To detect the valid edge, the signal input to the TI000 pin is sampled during the clock cycle of f
Remarks 1. For the setting of I/O pins, see 6.3 (6) Port mode register 3 (PM3).
TI000 pin
Timing of generation of INTTM000 signal (second time or later)
= Number of times of detection of valid edge of external event
Timing of generation of INTTM000 signal (first time only)
= Number of times of detection of valid edge of external event input
2. For how to enable the INTTM000 signal interrupt, see CHAPTER 17 INTERRUPT FUNCTIONS.
detection
Edge
f
PRS
TMC003, TMC002
Figure 6-20. Block Diagram of External Event Counter Operation
Operable bits
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
User’s Manual U18698EJ1V0UD
16-bit counter (TM00)
CR000 register
Clear
Match signal
(Set value of CR000 + 1)
(Set value of CR000 + 2)
controller
INTTM000 signal
Output
TO00
output
PRS
. The valid edge
TO00 pin