UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 158

8BIT UC, 32K FLASH, 1KB RAM, LCD

UPD78F0413GA-GAM-AX

Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0413GA-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal

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6.4 Operation of 16-Bit Timer/Event Counter 00
6.4.1 Interval timer operation
mode entered upon a match between TM00 and CR000), the count operation is started in synchronization with the
count clock.
(INTTM000) is generated. This INTTM000 signal enables TM00 to operate as an interval timer.
158
If bits 3 and 2 (TMC003 and TMC002) of the 16-bit timer mode control register (TMC00) are set to 11 (clear & start
When the value of TM00 later matches the value of CR000, TM00 is cleared to 0000H and a match interrupt signal
Remarks 1. For the setting of I/O pins, see 6.3 (6) Port mode register 3 (PM3).
Compare match interrupt
(TMC003, TMC002)
2. For how to enable the INTTM000 interrupt, see CHAPTER 17 INTERRUPT FUNCTIONS.
Compare register
Count clock
TM00 register
Operable bits
(INTTM000)
(CR000)
TMC003, TMC002
0000H
Operable bits
Figure 6-13. Basic Timing Example of Interval Timer Operation
Figure 6-12. Block Diagram of Interval Timer Operation
00
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
Interval
(N + 1)
User’s Manual U18698EJ1V0UD
N
16-bit counter (TM00)
CR000 register
Clear
Interval
(N + 1)
N
Match signal
11
N
Interval
(N + 1)
N
INTTM000 signal
Interval
(N + 1)
N

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