UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 443

8BIT UC, 32K FLASH, 1KB RAM, LCD

UPD78F0413GA-GAM-AX

Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0413GA-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal

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(2) Interrupt mask flag registers (MK0L, MK0H, MK1L, MK1H)
Note
Caution Be sure to set bits 5 and 6 of MK0L, bit 6 of MK1L, and bits 2 to 7 of MK1H to 1.
The interrupt mask flags are used to enable/disable the corresponding maskable interrupt servicing.
MK0L, MK0H, MK1L, and MK1H are set by a 1-bit or 8-bit memory manipulation instruction. When MK0L and
MK0H, and MK1L and MK1H are combined to form 16-bit registers MK0 and MK1, they are set by a 16-bit
memory manipulation instruction.
Reset signal generation sets these registers to FFH.
Address: FFE4H
Symbol
MK0L
Address: FFE5H
Symbol
MK0H
Address: FFE6H
Symbol
MK1L
Address: FFE7H
Symbol
MK1H
PD78F041x only.
Figure 17-3. Format of Interrupt Mask Flag Registers (MK0L, MK0H, MK1L, MK1H)
TMMK010
SREMK6
TMMK52
XXMKX
<7>
<7>
<7>
7
1
0
1
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
Interrupt servicing enabled
Interrupt servicing disabled
TMMK000
<6>
6
1
6
1
6
1
CHAPTER 17 INTERRUPT FUNCTIONS
R/W
R/W
R/W
R/W
TMMK50
RTCMK
<5>
<5>
User’s Manual U18698EJ1V0UD
5
1
5
1
TMMKH0
KRMK
PMK3
<4>
<4>
<4>
4
1
Interrupt servicing control
TMMKH1
TMMK51
PMK2
<3>
<3>
<3>
3
1
RTCIMK
STMK0
PMK1
<2>
<2>
<2>
2
1
MCGMK
SRMK0
STMK6
PMK0
<1>
<1>
<1>
<1>
ADMK
TMHMK2
SRMK6
LVIMK
<0>
<0>
<0>
<0>
Note
443

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