UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 135

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

(1) CPU operating with internal high-speed oscillation clock (B) after reset release (A)
(2) CPU operating with high-speed system clock (C) after reset release (A)
Caution Set the clock after the supply voltage has reached the operable voltage of the clock to be set (see
(3) CPU operating with subsystem clock (D) after reset release (A)
(A)
Status Transition
(A)
(A)
Status Transition
(A)
Table 5-5 shows transition of the CPU clock and examples of setting the SFR registers.
Remarks 1. (A) to (I) in Table 5-5 correspond to (A) to (I) in Figure 5-15.
(The CPU operates with the internal high-speed oscillation clock immediately after a reset release (B).)
(The CPU operates with the internal high-speed oscillation clock immediately after a reset release (B).)
(B)
(B)
(B)
(B)
CHAPTER 27 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS)).
(C) (X1 clock)
(C) (external main clock)
(D)
2. EXCLK, OSCSEL, OSCSELS:
(Setting sequence of SFR registers)
(Setting sequence of SFR registers)
Status Transition
MSTOP:
XSEL, MCM0:
CSS:
Table 5-5. CPU Clock Transition and SFR Register Setting Examples (1/4)
Setting Flag of SFR Register
Setting Flag of SFR Register
Bits 7, 6, and 4 of the clock operation mode select register (OSCCTL)
Bit 7 of the main OSC control register (MOC)
Bits 2 and 0 of the main clock mode register (MCM)
Bit 4 of the processor clock control register (PCC)
CHAPTER 5 CLOCK GENERATOR
User’s Manual U18698EJ1V0UD
SFR registers do not have to be set (default status after reset release).
EXCLK
OSCSELS
0
1
1
OSCSEL
1
1
Waiting for Oscillation
SFR Register Setting
Stabilization
Necessary
MSTOP
0
0
Must not be
checked
Must be
Register
checked
OSTC
XSEL
1
1
CSS
1
MCM0
1
1
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