ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 812
![KIT DEV/EVAL FOR AVR32 AT32UC3A](/photos/9/20/92035/atevk1104_sml.jpg)
ATEVK1104
Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.ATEVK1104.pdf
(826 pages)
3.ATEVK1104.pdf
(90 pages)
4.ATEVK1104.pdf
(6 pages)
5.ATEVK1104.pdf
(12 pages)
Specifications of ATEVK1104
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
- ATAVRONE-PROBECBL PDF datasheet
- ATEVK1104 PDF datasheet #2
- ATEVK1104 PDF datasheet #3
- ATEVK1104 PDF datasheet #4
- ATEVK1104 PDF datasheet #5
- Current page: 812 of 826
- Download datasheet (20Mb)
41.5.8
32058J–AVR32–04/11
Power Manager
2.
3.
4.
5. USART SPI mode is non functional on this revision.
6. DCD is active High instead of Low.
7. ISO7816 info register US_NER cannot be read
1.
2. Wrong reset causes when BOD is activated
3. PLL0/1 Lock control does not work
In asynchronous mode the RXBREAK flag is not correctly handled when the timeguard is 0
and the break character is located just after the stop bit.
Fix/Workaround
If the NBSTOP is 1, timeguard should be different from 0.
If CTS switches from 0 to 1 during the TX of a character, if the Holding register is not empty,
the TXHOLDING is also transmitted.
Fix/Workaround
None.
Manchester encoding/decoding is not working.
Fix/Workaround
Do not use manchester encoding.
Fix/Workaround
Do not use the USART SPI mode.
In modem mode the DCD signal is assumed to be active high by the USART, butshould
have been active low.
Fix/Workaround
Add an external inverter to the DCD line.
The NER register always returns zero.
Fix/Workaround
None.
device
The voltage regulator input and output is connected to VDDIO and VDDCORE respectively
inside the device.
Fix/Workaround
Do not supply VDDCORE externally, as this supply will work in paralell with the regulator.
Setting the BOD enable fuse will cause the Reset Cause Register to list BOD reset as the
reset source even though the part was reset by another source.
Fix/Workaround
Do not set the BOD enable fuse, but activate the BOD as soon as your program starts.
Lock Control does not work for PLL0 and PLL1.
USART RXBREAK problem when no timeguard
USART Handshaking: 2 characters sent / CTS rises when TX
USART PDC and TIMEGUARD not supported in MANCHESTER
Voltage regulator input and output is connected to VDDIO and VDDCORE inside the
812
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