ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 377

• Manufacturer Part Number: ATEVK1104
• Description: KIT DEV/EVAL FOR AVR32 AT32UC3A
• Manufacturer: Atmel
• Series: AVR®32r
• Type: MCUr

Specifications of ATEVK1104

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT32UC3A3
• Data Bus Width: 32 bit
• Interface Type: USB, SPI, USART
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: AT32UC3A3256
• Silicon Family Name: AVR
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT32UC3A3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

32058J–AVR32–04/11
– Read is Controlled by NCS (READ_MODE = 0)
Figure 27-11. READ_MODE = 1: Data is sampled by SMC before the rising edge of NRD
Figure 27-12
the falling edge of the NCS signal and remains valid until the rising edge of NCS. Data must be
sampled when NCS is raised. In that case, the READ_MODE must be set to 0 (read is controlled
by NCS): the SMC internally samples the data on the rising edge of Master Clock that generates
the rising edge of NCS, whatever the programmed waveform of NRD may be.
NBS0, NBS1,
A0, A1
CLK_SMC
D[15:0]
A[25:2]
NRD
NCS
shows the typical read cycle of an LCD module. The read data is valid t
t
PACC
Data Sampling
AT32UC3A
PACC
after
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