ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 412
![KIT DEV/EVAL FOR AVR32 AT32UC3A](/photos/9/20/92035/atevk1104_sml.jpg)
ATEVK1104
Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.ATEVK1104.pdf
(826 pages)
3.ATEVK1104.pdf
(90 pages)
4.ATEVK1104.pdf
(6 pages)
5.ATEVK1104.pdf
(12 pages)
Specifications of ATEVK1104
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
- ATAVRONE-PROBECBL PDF datasheet
- ATEVK1104 PDF datasheet #2
- ATEVK1104 PDF datasheet #3
- ATEVK1104 PDF datasheet #4
- ATEVK1104 PDF datasheet #5
- Current page: 412 of 826
- Download datasheet (20Mb)
28.5
28.5.1
Figure 28-2. SDRAM Controller Connections to SDRAM Devices: 32-bit Data Bus Width
Figure 28-3. SDRAM Controller Connections to SDRAM Devices: 16-bit Data Bus Width
32058J–AVR32–04/11
Application Example
Hardware Interface
Controller
Controller
SDRAM
SDRAM
SDRAMC_A[0-12]
SDRAMC_A[0-12]
D0-D31
SDCKE
SDWE
NBS3
SDCS
SDCK
NBS0
NBS1
NBS2
D0-D31
SDCKE
RAS
CAS
BA0
BA1
SDWE
SDCS
SDCK
NBS0
NBS1
RAS
CAS
BA0
BA1
Figure 28-2
32-bit data bus width.
bit data bus width. It is important to note that these examples are given for a direct connection of
the devices to the SDRAM Controller, without External Bus Interface or PIO Controller
multiplexing.
D16-D23
D0-D7
SDWE
NBS0
SDWE
NBS2
shows an example of SDRAM device connection to the SDRAM Controller using a
D0-D7
SDWE
NBS0
D0-D7
CS
CLK
CKE
WE
RAS
CAS
DQM
D0-D7
CS
CLK
CKE
WE
RAS
CAS
DQM
D0-D7
CS
CLK
CKE
WE
RAS
CAS
DQM
SDRAM
SDRAM
2M x 8
2M x 8
SDRAM
2M x 8
A0-A9, A11
A0-A9, A11
Figure 28-3
A0-A9, A11
BA0
BA1
BA0
BA1
A10
A10
BA0
BA1
A10
SDRAMC_A[0-9], SDRAMC_A11
SDRAMC_A10
BA0
BA1
SDRAMC_A[0-9], SDRAMC_ A11
SDRAMC_A10
BA0
BA1
SDRAMC_A[0-9], SDRAMC_A11
SDRAMC_A10
BA0
BA1
shows an example of SDRAM device connection using a 16-
D24-D31
D8-D15
SDWE
SDWE
NBS3
NBS1
D8-D15
SDWE
NBS1
D0-D7
CS
CLK
CKE
WE
RAS
CAS
DQM
D0-D7
CS
CLK
CKE
WE
RAS
CAS
DQM
D0-D7
CS
CLK
CKE
WE
RAS
CAS
DQM
SDRAM
SDRAM
2M x 8
2M x 8
SDRAM
2M x 8
A0-A9, A11
A0-A9, A11
A0-A9, A11
BA0
BA1
A10
A10
BA0
BA1
BA0
BA1
A10
SDRAMC_A[0-9], SDRAMC_A11
SDRAMC_A10
BA0
BA1
SDRAMC_A[0-9], SDRAMC_A11
SDRAMC_A10
BA0
BA1
SDRAMC_A[0-9], SDRAMC_A11
SDRAMC_A10
BA0
BA1
AT32UC3A
412
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