ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 308
![KIT DEV/EVAL FOR AVR32 AT32UC3A](/photos/9/20/92035/atevk1104_sml.jpg)
ATEVK1104
Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.ATEVK1104.pdf
(826 pages)
3.ATEVK1104.pdf
(90 pages)
4.ATEVK1104.pdf
(6 pages)
5.ATEVK1104.pdf
(12 pages)
Specifications of ATEVK1104
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
- ATAVRONE-PROBECBL PDF datasheet
- ATEVK1104 PDF datasheet #2
- ATEVK1104 PDF datasheet #3
- ATEVK1104 PDF datasheet #4
- ATEVK1104 PDF datasheet #5
- Current page: 308 of 826
- Download datasheet (20Mb)
26.7.1.5
Table 26-3.
Table 26-4.
Table 26-5.
32058J–AVR32–04/11
DI field
Di (decimal)
FI field
Fi (decimal
Fi/Di
16
32
12
20
1
2
4
8
Baud Rate in ISO 7816 Mode
23.25
11.62
46.5
18.6
Binary and Decimal Values for Di
Binary and Decimal Values for Fi
Possible Values for the Fi/Di Ratio
372
372
186
0000
93
31
372
0001
1
0001
139.5
69.75
34.87
17.43
372
46.5
27.9
558
558
279
has no effect. The external clock frequency must be at least 4.5 times lower than the system
clock.
When either the external clock CLK or the internal clock divided (CLK_USART/DIV) is selected,
the value programmed in CD must be even if the user has to ensure a 50:50 mark/space ratio on
the CLK pin. If the internal clock CLK_USART is selected, the Baud Rate Generator ensures a
50:50 duty cycle on the CLK pin, even if the value programmed in CD is odd.
The ISO7816 specification defines the bit rate with the following formula:
where:
Di is a binary value encoded on a 4-bit field, named DI, as represented in
308.
Fi is a binary value encoded on a 4-bit field, named FI, as represented in
308.
Table 26-5 on page 308
clock and the baud rate clock.
If the USART is configured in ISO7816 Mode, the clock selected by the USCLKS field in the
Mode Register (MR) is first divided by the value programmed in the field CD in the Baud Rate
•B is the bit rate
•Di is the bit-rate adjustment factor
•Fi is the clock frequency division factor
•f is the ISO7816 clock frequency (Hz)
0010
0010
558
2
23.25
46.5
37.2
774
744
372
186
93
62
B
0011
=
744
139.5
69.75
34.87
Di
----- - -
Fi
1116
1116
55.8
558
279
0011
93
×
4
f
shows the resulting Fi/Di Ratio, which is the ratio between the ISO7816
0100
1116
1488
1488
46.5
74.4
744
372
186
124
93
0100
0101
1488
8
232.5
116.2
58.13
1806
1860
930
465
155
93
0110
1860
0101
16
42.66
25.6
512
512
256
128
64
32
16
1001
512
0110
38.4
768
768
384
192
96
48
24
64
32
1010
768
85.33
1024
1024
51.2
512
256
128
64
32
1011
1024
1000
12
AT32UC3A
Table 26-4 on page
Table 26-3 on page
1536
1536
76.8
768
384
192
128
1100
1536
96
48
1001
20
170.6
102.4
1101
2048
2048
2048
1024
512
256
128
64
308
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