AM8530H AMD [Advanced Micro Devices], AM8530H Datasheet - Page 174

• Manufacturer Part Number: AM8530H
• Description: Serial Communications Controller
• Manufacturer: AMD [Advanced Micro Devices]

SCC Application Notes
7.5.4
This example shows how a Programmable Array Logic (PAL) device simplifies the task of
interrupt generation compared to the MSI implementation. The block diagram for the in-
terface via a PAL device is shown in Figure 7–14. The timing diagram (Figure 7–15) illus-
trates the Interrupt Acknowledge cycle. As in the other designs, RD is generated during
Interrupt Acknowledge to place the vector on the bus.
The timing during register programming is not shown. The PAL device allows selection of
one or two Wait States by making W0 High or Low respectively. The table below shows
the appropriate number of Wait Sates as a function of CPU speed.
PAL OUTPUTS:
DTACK
RD
AS
DS
C
A
B
The 68000 and Am8530H with Interrupts via a PAL
Device
PAL device equations are shown in Figure 7–16.
CPU Speed
Figure 7–15. PAL Timing
10 MHz
4 MHz
6 MHz
8 MHz
Wait States
1
2
2
2
AMD
7–25