AM8530H AMD [Advanced Micro Devices], AM8530H Datasheet - Page 134
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AM8530H
Manufacturer Part Number
AM8530H
Description
Serial Communications Controller
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM8530H.pdf
(194 pages)
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Bit 7: RTxC—XTAL/ NO XTAL
This bit controls the type of input signal the SCC expects to see on the RTxC pin. If this
bit is set to ‘0’, the SCC expects a TTL-compatible signal as an input to this pin. If this bit
is set to ‘1’, the SCC connects a high-gain amplifier between the RTxC and SYNC pins in
expectation of a quartz crystal being placed across the pins.
The output of this oscillator is available for use as a clocking source. In this mode of op-
eration, the Sync pin is unavailable for other use. The Sync signal is forced to ‘0’ inter-
nally. A hardware reset forces No XTAL. (At least 20 ms should be allowed after this bit is
set to allow the oscillator to stabilize.)
Bits 6 and 5: Receiver Clock 1 And 0
These bits determine the source of the receive clock as shown in Table 6–6. They do not
interfere with any of the modes of operation in the SCC but simply control a multiplexer
just before the internal receive clock input. A hardware reset forces the receive clock to
come from the TRxC pin.
6–24
D
D
0
0
1
1
7
6
D
0
0
1
1
6
Table 6–6. Receive Clock Source
D
0
1
0
1
Figure 6–13. Write Register 11
5
D
D
0
0
1
1
Receive Clock = RTxC Pin
Receive Clock = TRxC Pin
Receive Clock = BR Generator Output
Receive Clock = DPLL Output
4
0
1
0
1
5
D
0
1
0
1
3
D
Transmit Clock = RTxC Pin
Transmit Clock = TRxC Pin
Transmit Clock = BR Generator Output
Transmit Clock = DPLL Output
2
Receive Clock = RTxC pin
Receive Clock = TRxC pin
Receive Clock = BRG output
Receive Clock = DPLL output
D
0
0
1
1
1
D
0
1
0
1
0
TRxC Out = XTAL Output
TRxC Out = Transmit Clock
TRxC Out = BR Generator Output
TRxC Out = DPLL Output
TRxC O/I
RTxC XTAL/NO XTAL
Register Description