AM8530H AMD [Advanced Micro Devices], AM8530H Datasheet - Page 152

• Manufacturer Part Number: AM8530H
• Description: Serial Communications Controller
• Manufacturer: AMD [Advanced Micro Devices]

CHAPTER 7
7.1
7.1.1
This application note describes the software initialization procedure for the Am8530 Serial
Communications Controller (SCC).
Table 7–1 provides a worksheet that can be used as an aid when initializing the SCC.
Since all SCC operation modes are initialized in a similar manner, the worksheet can be
used to tailor the SCC device to the user’s individual need. Specific examples are given in
the following chapters.
7.1.1.1
Each of the SCC’s two channels has its own separate Write registers that are pro-
grammed to initialize different operating modes. There are two types of bits in the Write
registers: Command bits and Mode bits. An example of a register that contains both
types of bits is Write Register 9 (WR9), and is shown in Figure 7–1.
WR9 is the Master Interrupt Control register and contains the Reset command bits. Com-
mand bits are denoted by having boxes drawn around them in register diagrams. Bit D5
in this register is not used in this register and must be 0 at all times.
The Command bits, D7 and D6, select one of the reset commands for the SCC. Setting
either of these bits to 1 disables both the receiver and the transmitter in the correspond-
ing channel, forces TxD for the channel marking, forces the modem control signals High
in that channel, resets all IPs and IUSs, and disables all interrupts in that channel. Func-
tions controlled by the Command bits can be enabled or disabled only; they cannot be
toggled.
SCC Application Notes
Am8530H INITIALIZATION
Introduction
Register Overview
D
0
0
1
1
7
D
0
1
0
1
6
D
No Reset
Channel Reset B
Channel Reset A
Force Hardware Reset
5
Figure 7–1. Write Register 9
D
4
D
3
D
2
D
1
D
0
VIS
NV
DLC
MIE
STATUS HIGH/STATUS LOW
0
7–3