MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 94

• Manufacturer Part Number: MC68HC908JL8
• Description: Motorola reserves the right to make changes without further notice to any products herein
• Manufacturer: MOTOROLA [Motorola, Inc]

System Integration Module (SIM)
7.4.2.5 Low-Voltage Inhibit (LVI) Reset
7.5 SIM Counter
7.5.1 SIM Counter During Power-On Reset
7.5.2 SIM Counter During Stop Mode Recovery
Technical Data
94
The low-voltage inhibit module (LVI) asserts its output to the SIM when
the V
status register (RSR) is set, and the external reset pin (RST) is held low
while the SIM counter counts out 4096 ICLK cycles. Sixty-four ICLK
cycles later, the CPU and memories are released from reset to allow the
reset vector sequence to occur. The SIM actively pulls down the RST pin
for all internal reset sources.
The SIM counter is used by the power-on reset module (POR) and in
stop mode recovery to allow the oscillator time to stabilize before
enabling the internal bus (IBUS) clocks. The SIM counter also serves as
a prescaler for the computer operating properly module (COP). The SIM
counter uses 12 stages for counting, followed by a 13th stage that
triggers a reset of SIM counters and supplies the clock for the COP
module. The SIM counter is clocked by the falling edge of ICLK.
The power-on reset module (POR) detects power applied to the MCU.
At power-on, the POR circuit asserts the signal PORRST. Once the SIM
is initialized, it enables the oscillator to drive the bus clock state machine.
The SIM counter also is used for stop mode recovery. The STOP
instruction clears the SIM counter. After an interrupt, break, or reset, the
SIM senses the state of the short stop recovery bit, SSREC, in the mask
option register. If the SSREC bit is a logic one, then the stop recovery is
reduced from the normal delay of 4096 ICLK cycles down to 32 ICLK
cycles. This is ideal for applications using canned oscillators that do not
require long start-up times from stop mode. External crystal applications
should use the full stop recovery time, that is, with SSREC cleared in the
configuration register 1 (CONFIG1).
Freescale Semiconductor, Inc.
For More Information On This Product,
DD
voltage falls to the LVI trip voltage V
System Integration Module (SIM)
Go to: www.freescale.com
TRIP
. The LVI bit in the reset
MC68HC908JL8
MOTOROLA
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Rev. 2.0