MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 215

• Manufacturer Part Number: MC68HC908JL8
• Description: Motorola reserves the right to make changes without further notice to any products herein
• Manufacturer: MOTOROLA [Motorola, Inc]

12.8.2 ADC Data Register
12.8.3 ADC Input Clock Register
MC68HC908JL8
MOTOROLA
—
Rev. 2.0
Address:
Address:
One 8-bit result register is provided. This register is updated each time
an ADC conversion completes.
This register selects the clock frequency for the ADC.
ADIV[2:0] — ADC Clock Prescaler Bits
Reset:
Reset:
Read:
Read:
Write:
Write:
ADIV[2:0] form a 3-bit field which selects the divide ratio used by the
ADC to generate the internal ADC clock.
available clock configurations. The ADC clock should be set to
approximately 1MHz.
Freescale Semiconductor, Inc.
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ADIV2
Bit 7
Bit 7
AD7
Figure 12-5. ADC Input Clock Register (ADICLK)
Analog-to-Digital Converter (ADC)
0
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Figure 12-4. ADC Data Register (ADR)
= Unimplemented
= Unimplemented
ADIV1
AD6
6
6
0
ADIV0
AD5
5
5
0
Indeterminate after reset
AD4
4
4
0
0
AD3
3
3
0
0
Analog-to-Digital Converter (ADC)
Table 12-2
AD2
2
2
0
0
shows the
AD1
1
1
0
0
Technical Data
I/O Registers
Bit 0
AD0
Bit 0
0
0
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