MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 225

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MC68HC908JL8

Manufacturer Part Number
MC68HC908JL8
Description
Motorola reserves the right to make changes without further notice to any products herein
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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13.4.2 Data Direction Register B (DDRB)
MC68HC908JL8
MOTOROLA
NOTE:
Rev. 2.0
Address:
Data direction register B determines whether each port B pin is an input
or an output. Writing a logic 1 to a DDRB bit enables the output buffer for
the corresponding port B pin; a logic 0 disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
the port B I/O logic.
Reset:
Read:
Write:
These read/write bits control port B data direction. Reset clears
DDRB[7:0], configuring all port B pins as inputs.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
DDRB7
READ DDRB ($0005)
WRITE DDRB ($0005)
WRITE PTB ($0001)
READ PTB ($0001)
$0005
Bit 7
0
Figure 13-8. Data Direction Register B (DDRB)
Go to: www.freescale.com
Input/Output (I/O) Ports
DDRB6
6
0
Figure 13-9. Port B I/O Circuit
RESET
DDRB5
5
0
DDRB4
DDRBx
PTBx
4
0
DDRB3
3
0
DDRB2
To Analog-To-Digital Converter
2
0
Figure 13-9
Input/Output (I/O) Ports
DDRB1
1
0
Technical Data
shows
DDRB0
Bit 0
Port B
0
PTBx
225

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