MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 162

• Manufacturer Part Number: MC68HC908JL8
• Description: Motorola reserves the right to make changes without further notice to any products herein
• Manufacturer: MOTOROLA [Motorola, Inc]

Timer Interface Module (TIM)
10.10.2 TIM Counter Registers
Technical Data
162
NOTE:
Address: T1CNTH, $0021 and T2CNTH, $0031
PS[2:0] — Prescaler Select Bits
The two read-only TIM counter registers contain the high and low bytes
of the value in the TIM counter. Reading the high byte (TCNTH) latches
the contents of the low byte (TCNTL) into a buffer. Subsequent reads of
TCNTH do not affect the latched TCNTL value until TCNTL is read.
Reset clears the TIM counter registers. Setting the TIM reset bit (TRST)
also clears the TIM counter registers.
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL
by reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
These read/write bits select one of the seven prescaler outputs as the
input to the TIM counter as
PS[2:0] bits.
PS2
0
0
0
0
1
1
1
1
For More Information On This Product,
Bit 15
Figure 10-5. TIM Counter Registers High (TCNTH)
Bit 7
0
Timer Interface Module (TIM)
Go to: www.freescale.com
PS1
0
0
1
1
0
0
1
1
= Unimplemented
14
6
0
Table 10-2. Prescaler Selection
PS0
0
1
0
1
0
1
0
1
13
5
0
Table 10-2
12
4
0
Internal bus clock ÷ 1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
T2CLK (for TIM2 only)
shows. Reset clears the
11
3
0
TIM Clock Source
MC68HC908JL8
10
2
0
1
9
0
MOTOROLA
—
Rev. 2.0
Bit 0
Bit 8
0