MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 232

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MC68HC908JL8

Manufacturer Part Number
MC68HC908JL8
Description
Motorola reserves the right to make changes without further notice to any products herein
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Input/Output (I/O) Ports
13.6.2 Data Direction Register E (DDRE)
Technical Data
232
NOTE:
NOTE:
Address:
Data direction register E determines whether each port E pin is an input
or an output. Writing a logic 1 to a DDRE bit enables the output buffer for
the corresponding port E pin; a logic 0 disables the output buffer.
For those devices packaged in a 20-pin package and 28-pin package,
PTE0–PTE1 are not connected. DDRE0–DDRE1 should be set to a 1 to
configure PTE0–PTE1 as outputs.
DDRE[1:0] — Data Direction Register E Bits
Avoid glitches on port E pins by writing to the port E data register before
changing data direction register E bits from 0 to 1.
the port E I/O logic.
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
These read/write bits control port E data direction. Reset clears
DDRE[1:0], configuring all port E pins as inputs.
For More Information On This Product,
1 = Corresponding port E pin configured as output
0 = Corresponding port E pin configured as input
$000C
Bit 7
Figure 13-15. Data Direction Register E (DDRE)
0
Go to: www.freescale.com
Input/Output (I/O) Ports
6
0
5
0
4
0
3
0
MC68HC908JL8
Figure 13-16
2
0
DDRE1
1
0
MOTOROLA
shows
Rev. 2.0
DDRE0
Bit 0
0

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