MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 190

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MC68HC908JL8

Manufacturer Part Number
MC68HC908JL8
Description
Motorola reserves the right to make changes without further notice to any products herein
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Serial Communications Interface (SCI)
11.8 I/O Signals
11.8.1 TxD (Transmit Data)
11.8.2 RxD (Receive Data)
11.9 I/O Registers
Technical Data
190
To protect status bits during the break state, write a logic 0 to the BCFE
bit. With BCFE at logic 0 (its default state), software can read and write
I/O registers during the break state without affecting status bits. Some
status bits have a 2-step read/write clearing procedure. If software does
the first step on such a bit before the break, the bit cannot change during
the break state as long as BCFE is at logic 0. After the break, doing the
second step clears the status bit.
The two SCI I/O pins are:
The PTD6/TxD pin is the serial data output from the SCI transmitter.
The PTD7/RxD pin is the serial data input to the SCI receiver.
These I/O registers control and monitor SCI operation:
Freescale Semiconductor, Inc.
For More Information On This Product,
PTD6/TxD — Transmit data
PTD7/RxD — Receive data
SCI control register 1 (SCC1)
SCI control register 2 (SCC2)
SCI control register 3 (SCC3)
SCI status register 1 (SCS1)
SCI status register 2 (SCS2)
SCI data register (SCDR)
SCI baud rate register (SCBR)
Serial Communications Interface (SCI)
Go to: www.freescale.com
MC68HC908JL8
MOTOROLA
Rev. 2.0

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