MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 203

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MC68HC908JL8

Manufacturer Part Number
MC68HC908JL8
Description
Motorola reserves the right to make changes without further notice to any products herein
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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11.9.5 SCI Status Register 2
MC68HC908JL8
MOTOROLA
Rev. 2.0
Address:
SCI status register 2 contains flags to signal the following conditions:
BKF — Break Flag Bit
RPF — Reception in Progress Flag Bit
Reset:
Read:
Write:
This clearable, read-only bit is set when the SCI detects a break
character on the RxD pin. In SCS1, the FE and SCRF bits are also
set. In 9-bit character transmissions, the R8 bit in SCC3 is cleared.
BKF does not generate a CPU interrupt request. Clear BKF by
reading SCS2 with BKF set and then reading the SCDR. Once
cleared, BKF can become set again only after logic 1s again appear
on the RxD pin followed by another break character. Reset clears the
BKF bit.
This read-only bit is set when the receiver detects a logic 0 during the
RT1 time period of the start bit search. RPF does not generate an
interrupt request. RPF is reset after the receiver detects false start bits
(usually from noise or a baud rate mismatch) or when the receiver
detects an idle character. Polling RPF before disabling the SCI
module or entering stop mode can show whether a reception is in
progress.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Break character detected
0 = No break character detected
1 = Reception in progress
0 = No reception in progress
Break character detected
Incoming data
Serial Communications Interface (SCI)
$0017
Bit 7
0
Figure 11-14. SCI Status Register 2 (SCS2)
Go to: www.freescale.com
= Unimplemented
6
0
5
0
4
0
Serial Communications Interface (SCI)
3
0
2
0
BKF
1
0
Technical Data
I/O Registers
Bit 0
RPF
0
203

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