MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 50

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MC68HC908JL8

Manufacturer Part Number
MC68HC908JL8
Description
Motorola reserves the right to make changes without further notice to any products herein
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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FLASH Memory (FLASH)
4.3 Functional Description
Technical Data
50
# Non-volatile FLASH register; write by programming.
$FFCF
Addr.
$FE08
FLASH Control Register
FLASH Block Protect
Register Name
NOTE:
(FLBPR)
Register
(FLCR)
#
The FLASH memory consists of an array of 8,192 bytes for user memory
plus a block of 36 bytes for user interrupt vectors. An erased bit reads as
logic 1 and a programmed bit reads as a logic 0. The FLASH memory
page size is defined as 64 bytes, and is the minimum size that can be
erased in a page erase operation. Program and erase operations are
facilitated through control bits in FLASH control register (FLCR). The
address ranges for the FLASH memory are:
Programming tools are available from Motorola. Contact your local
Motorola representative for more information.
A security feature prevents viewing of the FLASH contents.
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
Reset:
Reset:
Read:
Write:
Read:
Write:
Figure 4-1. FLASH I/O Register Summary
Freescale Semiconductor, Inc.
For More Information On This Product,
$DC00–$FBFF; user memory; 12,288 bytes
$FFDC–$FFFF; user interrupt vectors; 36 bytes
BPR7
Bit 7
0
0
Go to: www.freescale.com
FLASH Memory (FLASH)
= Unimplemented
BPR6
6
0
0
BPR5
5
0
0
Unaffected by reset; $FF when blank
BPR4
4
0
0
HVEN
BPR3
3
0
MC68HC908JL8
MASS
BPR2
2
0
ERASE
BPR1
1
0
1
MOTOROLA
Rev. 2.0
BPR0
PGM
Bit 0
0

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