MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 209

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MC68HC908JL8

Manufacturer Part Number
MC68HC908JL8
Description
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Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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12.4.1 ADC Port I/O Pins
MC68HC908JL8
MOTOROLA
INTERNAL
DATA BUS
AIEN
INTERRUPT
LOGIC
READ DDRB/DDRD
WRITE DDRB/DDRD
WRITE PTB/PTD
READ PTB/PTD
COCO
BUS CLOCK
Rev. 2.0
CONVERSION
COMPLETE
PTB0–PTB7 and PTD0–PTD3 are general-purpose I/O pins that are
shared with the ADC channels. The channel select bits (ADC status and
control register, $003C), define which ADC channel/port pin will be used
as the input signal. The ADC overrides the port I/O logic by forcing that
pin as input to the ADC. The remaining ADC channels/port pins are
controlled by the port I/O logic and can be used as general-purpose I/O.
Freescale Semiconductor, Inc.
RESET
For More Information On This Product,
Figure 12-2. ADC Block Diagram
ADC DATA REGISTER
GENERATOR
Analog-to-Digital Converter (ADC)
ADIV[2:0]
CLOCK
ADC
Go to: www.freescale.com
ADC CLOCK
DDRBx/DDRDx
PTBx/PTDx
ADC VOLTAGE IN
ADCVIN
DISABLE
DISABLE
(1 OF 13 CHANNELS)
Analog-to-Digital Converter (ADC)
ADC0–ADC11
CHANNEL
SELECT
ADC CHANNEL x
ADCx
Functional Description
ADC12
Technical Data
ADCH[4:0]
209

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