MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 266

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MC68HC908JL8

Manufacturer Part Number
MC68HC908JL8
Description
Motorola reserves the right to make changes without further notice to any products herein
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Break Module (BREAK)
18.5.4 Break Flag Control Register (BFCR)
18.6 Low-Power Modes
18.6.1 Wait Mode
18.6.2 Stop Mode
Technical Data
266
Address:
Reset:
Read:
Write:
The break control register contains a bit that enables software to clear
status bits while the MCU is in a break state.
BCFE — Break Clear Flag Enable Bit
The WAIT and STOP instructions put the MCU in low-power-
consumption standby modes.
If enabled, the break module is active in wait mode. In the break routine,
the user can subtract one from the return address on the stack if SBSW
is set (see
zero to it.
A break interrupt causes exit from stop mode and sets the SBSW bit in
the break status register. See
Freescale Semiconductor, Inc.
This read/write bit enables software to clear status bits by accessing
status registers while the MCU is in a break state. To clear status bits
during the break state, the BCFE bit must be set.
For More Information On This Product,
$FE03
1 = Status bits clearable during break
0 = Status bits not clearable during break
BCFE
Bit 7
R
0
Figure 18-7. Break Flag Control Register (BFCR)
7.7 Low-Power
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= Reserved
Break Module (BREAK)
R
6
R
5
Modes). Clear the SBSW bit by writing logic
7.8 SIM
R
4
Registers.
R
3
MC68HC908JL8
R
2
R
1
MOTOROLA
Rev. 2.0
Bit 0
R

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