MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 103

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MC68HC908JL8

Manufacturer Part Number
MC68HC908JL8
Description
Motorola reserves the right to make changes without further notice to any products herein
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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MC68HC908JL8
MOTOROLA
Rev. 2.0
Wait mode can also be exited by a reset or break. A break interrupt
during wait mode sets the SIM break stop/wait bit, SBSW, in the break
status register (BSR). If the COP disable bit, COPD, in the mask option
register is logic zero, then the computer operating properly module
(COP) is enabled and remains active in wait mode.
Figure 7-16
EXITSTOPWAIT
NOTE: EXITSTOPWAIT =
Freescale Semiconductor, Inc.
ICLK
RST
IAB
IDB
R/W
IDB
IAB
NOTE: Previous data can be operand data or the WAIT opcode, depending on the
For More Information On This Product,
IDB
IAB
Figure 7-16. Wait Recovery from Interrupt or Break
$A6
System Integration Module (SIM)
WAIT ADDR
Figure 7-17. Wait Recovery from Internal Reset
last instruction.
$A6
Go to: www.freescale.com
and
$6E0B
$A6
PREVIOUS DATA
Figure 7-15. Wait Mode Entry Timing
Figure 7-17
$6E0B
$A6
RST
pin OR CPU interrupt OR break interrupt
$A6
WAIT ADDR + 1
$A6
Cycles
32
show the timing for WAIT recovery.
$6E0C
NEXT OPCODE
$01
Cycles
$00FF
32
$0B
SAME
System Integration Module (SIM)
$00FE
$6E
SAME
RST VCT H
$00FD
SAME
Low-Power Modes
RST VCT L
Technical Data
SAME
$00FC
103

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