MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 211

• Manufacturer Part Number: MC68HC908JL8
• Description: Motorola reserves the right to make changes without further notice to any products herein
• Manufacturer: MOTOROLA [Motorola, Inc]

12.4.5 Accuracy and Precision
12.5 Interrupts
12.6 Low-Power Modes
12.6.1 Wait Mode
12.6.2 Stop Mode
12.7 I/O Signals
MC68HC908JL8
MOTOROLA
—
Rev. 2.0
The conversion process is monotonic and has no missing codes.
When the AIEN bit is set, the ADC module is capable of generating a
CPU interrupt after each ADC conversion. A CPU interrupt is generated
if the COCO bit is at logic 0. The COCO bit is not used as a conversion
complete flag when interrupts are enabled.
The following subsections describe the ADC in low-power modes.
The ADC continues normal operation during wait mode. Any enabled
CPU interrupt request from the ADC can bring the MCU out of wait
mode. If the ADC is not required to bring the MCU out of wait mode,
power down the ADC by setting the ADCH[4:0] bits in the ADC status
and control register to logic 1’s before executing the WAIT instruction.
The ADC module is inactive after the execution of a STOP instruction.
Any pending conversion is aborted. ADC conversions resume when the
MCU exits stop mode. Allow one conversion cycle to stabilize the analog
circuitry before attempting a new ADC conversion after exiting stop
mode.
The ADC module has 12 channels that are shared with I/O port B and
port D, and one channel on ADC12/T2CLK pin.
Freescale Semiconductor, Inc.
For More Information On This Product,
Analog-to-Digital Converter (ADC)
Go to: www.freescale.com
Analog-to-Digital Converter (ADC)
Technical Data
Interrupts
211