MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 91

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MC68HC908JL8

Manufacturer Part Number
MC68HC908JL8
Description
Motorola reserves the right to make changes without further notice to any products herein
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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7.4.2 Active Resets from Internal Sources
MC68HC908JL8
MOTOROLA
Rev. 2.0
All internal reset sources actively pull the RST pin low for 32 ICLK cycles
to allow resetting of external peripherals. The internal reset signal IRST
continues to be asserted for an additional 32 cycles
internal reset can be caused by an illegal address, illegal opcode, COP
time-out, or POR. (See
that for POR resets, the SIM cycles through 4096 ICLK cycles during
which the SIM forces the RST pin low. The internal reset signal then
follows the sequence from the falling edge of RST shown in
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals
and other chips within a system built around the MCU.
Freescale Semiconductor, Inc.
ICLK
IRST
For More Information On This Product,
RST
IAB
System Integration Module (SIM)
Go to: www.freescale.com
ILLEGAL ADDRESS RST
ILLEGAL OPCODE RST
Figure 7-6. Sources of Internal Reset
RST PULLED LOW BY MCU
Figure 7-5. Internal Reset Timing
Figure 7-6 . Sources of Internal
COPRST
32 CYCLES
POR
LVI
INTERNAL RESET
System Integration Module (SIM)
32 CYCLES
Reset and System Initialization
(Figure
Reset.) Note
VECTOR HIGH
Technical Data
Figure
7-5). An
7-5.
91

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