PC87307VUL National Semiconductor, PC87307VUL Datasheet - Page 77

• Manufacturer Part Number: PC87307VUL
• Description: PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
• Manufacturer: National Semiconductor

The programmable FIFO threshold (THRESH) is useful in
adjusting the FDC to the speed of the system. A slow sys-
tem with a sluggish DMA transfer capability requires a high
value for THRESH. this gives the system more time to re-
spond to a data transfer service request (DRQ for DMA
mode or IRQ for interrupt mode). Conversely, a fast system
with quick response to a data transfer service request can
use a low value for THRESH.
5.3.8
This read-only diagnostic register is used to detect the state
of the DSKCHG disk interface input signal and some diag-
nostic signals. DIR is unaffected by a software reset.
The bits of the DIR register function differently depending
on whether the FDC is operating in PC-AT drive mode or in
PS/2 drive mode. See Section 5.1.2 on page 66.
In PC-AT drive mode, bits 6 through 0 are in TRI-STATE to
prevent conflict with the status register of the hard disk at
the same address as the DIR.
FIGURE 5-13. DIR Register Bitmap, Read Operations,
7
7
DSKCHG
1
6
6
FIGURE 5-12. FDC Data Register Bitmap
Digital Input Register (DIR), Offset 07h,
Read Operations
1
5
Read Operations, PC-AT Drive Mode
5
1
4
4
1
3
3
PC-AT Drive Mode
Data
2
2
Reserved, In TRI-STATE
1
1
1
0
0
The Digital Floppy Disk Controller (FDC) (Logical Device 3)
Reset
Required
Reset
Required
Register (DIR)
Data Register
Digital Input
Offset 07h
Offset 05h
(FIFO)
77
Bit 0 - High Density (PS/2 Drive Mode Only)
Bits 2,1 - Data Rata Select 1,0 (DRATE1,0)
(PS/2 Drive Mode Only)
Bits 6-3 - Reserved
Bit 7 - Disk Changed (DSKCHG)
FIGURE 5-14. DIR Register Bitmap, Read Operations,
7
In PC-AT drive mode, this bit is reserved, in TRI-STATE
and used by the status register of the hard disk.
In PS/2 drive mode, this bit indicates whether the data
transfer rate is high or low.
0 - The data transfer rate is high, i.e., 1 Mbps or 500
1 - The data transfer rate is low, i.e., 300 Kbps or 250
In PC-AT drive mode, these bits are reserved, in TRI-
STATE and used by the status register of the hard disk.
In PS/2 drive mode, these bits indicate the status of the
DRATE1,0 bits programmed in DSR or CCR, whichever
is written last.
The significance of each value for these bits depends on
the supported speeds. See Table 5-6.
00 - Data transfer rate is 500 Kbps.
01 - Data transfer rate is 300 Kbps.
10 - Data transfer rate is 250 Kbps.
11 - Data transfer rate is 1 Mbps.
These bits are reserved and are always 1. In PC-AT
mode these bits are also in TRI-STATE. They are used
by the status register of the fixed hard disk.
This bit reflects the status of the DSKCHG disk interface
input signal.
During power down this bit is invalid, if it is read by the
software.
0 - DSKCHG is not active.
1 - DSKCHG is active.
DSKCHG
1
6
Kbps.
Kbps.
1
5
Read Operations, PS/2 Drive Mode
1
4
Reserved
1
3
PS/2 Drive Mode
2
DRATE1 Status
1
DRATE0 Status
1
0
Reset
Required
High Density
Register (DIR)
Digital Input
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Offset 07h