PC87307VUL National Semiconductor, PC87307VUL Datasheet - Page 203

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PC87307VUL

Manufacturer Part Number
PC87307VUL
Description
PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
Manufacturer
National Semiconductor
Datasheet
t
t
t
t
t
t
t
t
t
t
KIP
KKP
KQP
QKP
QPP
QQP
QRP
RQP
TQP
TT
Symbol
a. One DMA transaction takes six clock cycles.
b. t
c. Only in case of pending DRQ.
d. The active edge of RD or WR and TC is recognized only when DACK is active.
DRQ
DACK
RD, WR
TC
CP
is defined in Table 13-35.
DACK Inactive Pulse Width
DACK Active Pulse Width
DACK Active Edge to DRQ Inactive
DRQ to DACK Active Edge
DRQ Period
DRQ Inactive Non-Burst Pulse Width
DRQ to RD, WR Active
RD, WR Active Edge to DRQ Inactive
TC Active Edge to DRQ Inactive
TC Active Pulse Width
t
QKP
t
QRP
Parameter
FIGURE 13-16. ECP DMA Timing
TABLE 13-46. ECP DMA Timing
Device Description
a b
d
203
t
KKP
t
KQP
t
QPP
t
TT
Min
330
300
25
65
10
15
50
t
TQP
t
RQP
65 + (6 x 32 x t
400
Max
65
75
c
t
KIP
CP
t
QQP
)
www.national.com
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