PC87307VUL National Semiconductor, PC87307VUL Datasheet - Page 154

• Manufacturer Part Number: PC87307VUL
• Description: PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
• Manufacturer: National Semiconductor

www.national.com
7.12.2 Extended Control Register 1 (EXCR1),
Use this register to control module operation in the Extend-
ed mode. Upon reset all bits are set to 0.
Bit 0 - Extended Mode Select (EXT_SL)
Bit 1 - DMA Fairness Control (DMANF)
Bit 2 - DMA FIFO Threshold (DMATH)
Bit 3 - DMA Swap (DMASWP)
0
7
Value
When set to 1, the Extended mode is selected.
This bit controls the maximum duration of DMA burst
transfers.
0 - DMA requests are forced inactive after approxi-
1 - A transmission DMA request is deactivated when
This bit selects the TX_FIFO and RX_FIFO threshold
levels used by the DMA request logic to support de-
mand transfer mode.
A transmission DMA request is generated when the
TX_FIFO level is below the threshold.
A reception DMA request is generated when the
RX_FIFO level reaches the threshold or when a DMA
timeout occurs.
Table 7-15 lists the threshold levels for each FIFO.
This bit selects the routing of the DMA control signals
between the internal DMA logic and the configuration
module of the chip. When this bit is 0, the transmitter
Bit
0
1
BTEST
0
1
6
mately 10.5 sec of continuous transmitter and/or
receiver DMA operation. (Default)
the TX_FIFO is full. A reception DMA request is de-
activated when the RX_FIFO is empty.
Bank 2, Offset 02h
FIGURE 7-23. EXCR1 Register Bitmap
Reserved
0
5
TABLE 7-15. DMA Threshold Levels
RX_FIFO
ETDLBK
0
4
10
4
LOOP
0
3
DMA Threshold for FIFO Type
DMASWP
0
2
DMATH
0
1
(16 Levels)
Tx_FIFO
DMANF
0
0
13
7
Reset
Required
UART1 and UART2 (with IR) (Logical Devices 5 and 6)
EXT_SL
Extended Control and
and Status Register 1
(32 Levels)
Tx_FIFO
Offset 02h
29
23
(EXCR1)
Bank 2,
154
.
Bit 4 - Loopback Enable (LOOP)
Channel
Channel
Logic
Logic
DMA
DMA
TX -
TX -
and receiver DMA control signals are not swapped.
When it is 1, they are swapped. A block diagram illus-
trating the control signals routing is given in Fig. 7-24.
The swap feature is particularly useful when only one
8237 DMA channel is used to serve both transmitter and
receiver. In this case only one external DRQ/DACK sig-
nal pair will be interconnected to the swap logic by the
configuration module. Routing the external DMA chan-
nel to either the transmitter or the receiver DMA logic is
then simply controlled by the DMASWP bit. This way,
the infrared device drivers do not need to know the de-
tails of the configuration module.
During loopback, the transmitter output is connected in-
ternally to the receiver input, to enable system self-test
of serial communications. In addition to the data signal,
all additional signals within the UART are interconnect-
ed to enable real transmission and reception using the
UART mechanisms.
When this bit is set to 1, loopback is selected. This bit
accesses the same internal register as bit 4 in the MCR
register, when the UART is in a Non-Extended mode.
Loopback behaves similarly in both Non-Extended and
Extended modes.
When Extended mode is selected, the DTR bit in the
MCR register internally drives both DSR and RI, and the
RTS bit drives CTS and DCD.
During loopback, the following actions occur:
1. The transmitter and receiver interrupts are fully op-
2. The DMA control signals are fully operational.
3. UART and infrared receiver serial input signals are
4. The UART transmitter serial output is forced high
FIGURE 7-24. DMA Control Signals Routing
erational. The Modem Status Interrupts are also fully
operational, but the interrupt sources are now the
lower bits of the MCR register. Modem interrupts in
infrared modes are disabled unless the IRMSSL bit
in the IRCR2 register is 0. Individual interrupts are
still controlled by the IER register bits.
disconnected. The internal receiver input signals are
connected to the corresponding internal transmitter
output signals.
and the infrared transmitter serial output is forced
low, unless the ETDLBK bit is set to 1. In which case
they function normally.
RX_DMA
TX_DMA
DMA Swap
DMASWP
Logic
Configuration
Routing
Module
Logic
DMA
Hand-
shake
Signals