s71ws256nc0bawa30 Meet Spansion Inc., s71ws256nc0bawa30 Datasheet - Page 88

• Manufacturer Part Number: s71ws256nc0bawa30
• Description: Stacked Multi-chip Product Mcp 256/512/128 Megabit 32m/16m/8m X 16 Bit Cmos 1.8 Volt-only Simultaneous Read/write, Burst-mode Flash Memory With 128/64megabit 8m/4m X 16-bit Psram.
• Manufacturer: Meet Spansion Inc.

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RDY(1) active with data (D8 = 1 in the Configuration Register).
RDY(2) active one clock cycle before data (D8 = 0 in the Configuration Register).
Cxx indicates the clock that triggers Dxx on the outputs; for example, C60 triggers D60.
Figure shows the device crossing a bank in the process of performing an erase or program.
RDY does not go low and no additional wait states are required for WS ≤ 5.
Address (hex)
RDY(1)
RDY(2)
AVD#
OE#,
Data
CE#
CLK
(stays high)
(stays low)
Figure 14.22 Latency with Boundary Crossing into Program/Erase Bank
00007Fh: (0000FFh, 00017Fh, etc.) Address 000000h is also a boundary crossing.
7C
C124
D124
Address boundary occurs every 128 words, beginning at address
7D
C125
D125
A d v a n c e
S71WS-Nx0 Based MCPs
t
C126
7E
RACC
D126
C127
t
7F
RACC
I n f o r m a t i o n
latency
D127
C127
7F
latency
t
RACC
t
RACC
Read Status
S71WS-N_01_A4 September 15, 2005