s71ws256nc0bawa30 Meet Spansion Inc., s71ws256nc0bawa30 Datasheet - Page 53

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s71ws256nc0bawa30

Manufacturer Part Number
s71ws256nc0bawa30
Description
Stacked Multi-chip Product Mcp 256/512/128 Megabit 32m/16m/8m X 16 Bit Cmos 1.8 Volt-only Simultaneous Read/write, Burst-mode Flash Memory With 128/64megabit 8m/4m X 16-bit Psram.
Manufacturer
Meet Spansion Inc.
Datasheet
Notes:
1.
2.
3.
4.
5.
6.
September 15, 2005 S71WS-N_01_A4
Suspend
Program
(Note
(Note
Write to
Buffer
DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. Refer to the
section on DQ5 for more information.
DQ7 a valid address when reading status information. Refer to the appropriate subsection for further details.
Data are invalid for addresses in a Program Suspended sector.
DQ1 indicates the Write to Buffer ABORT status during Write Buffer Programming operations.
The data-bar polling algorithm should be used for Write Buffer Programming operations. Note that DQ7# during Write Buffer Programming
indicates the data-bar for DQ7 data for the LAST LOADED WRITE-BUFFER ADDRESS location.
For any address changes after CE# assertion, re-assertion of CE# might be required after the addresses become stable for data polling
during the erase suspend operation using DQ2/DQ6.
Mode
3)
5)
Reading within Program Suspended Sector
Reading within Non-Program Suspended
Sector
BUSY State
Exceeded Timing Limits
ABORT State
A d v a n c e
Table 10.20 Write Operation Status
I n f o r m a t i o n
S71WS-Nx0 Based MCPs
INVALID
Allowed)
DQ7#
DQ7#
DQ7#
Data
(Not
INVALID
Allowed)
Toggle
Toggle
Toggle
Data
(Not
INVALID
Allowed)
Data
(Not
0
1
0
Allowed)
INVALID
Data
(Not
N/A
N/A
N/A
Allowed)
INVALID
Data
(Not
N/A
N/A
N/A
Allowed)
INVALID
Data
(Not
0
0
1
51

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