s71ws256nc0bawa30 Meet Spansion Inc., s71ws256nc0bawa30 Datasheet - Page 36

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s71ws256nc0bawa30

Manufacturer Part Number
s71ws256nc0bawa30
Description
Stacked Multi-chip Product Mcp 256/512/128 Megabit 32m/16m/8m X 16 Bit Cmos 1.8 Volt-only Simultaneous Read/write, Burst-mode Flash Memory With 128/64megabit 8m/4m X 16-bit Psram.
Manufacturer
Meet Spansion Inc.
Datasheet
10.5
34
10.5.1
Program/Erase Operations
These devices are capable of several modes of programming and or erase operations which are
described in detail in the following sections. However, prior to any programming and or erase op-
eration, devices must be setup appropriately as outlined in the configuration register
For any program and or erase operations, including writing command sequences, the system
must drive AVD# and CE# to V
drive WE# and CE# to V
Addresses are latched on the last falling edge of WE# or CE#, while data is latched on the 1st
rising edge of WE# or CE#.
Note the following:
Single Word Programming
Single word programming mode is the simplest method of programming. In this mode, four Flash
command write cycles are used to program an individual Flash address. The data for this pro-
gramming operation could be 8-, 16- or 32-bits wide. While this method is supported by all
Spansion devices, in general it is not recommended for devices that support Write Buffer Pro-
gramming. See
When the Embedded Program algorithm is complete, the device then returns to the read mode
and addresses are no longer latched. The system can determine the status of the program oper-
ation by using DQ7 or DQ6. Refer to the Write Operation Status section for information on these
status bits.
When the Embedded Program algorithm is complete, the device returns to the read mode.
The system can determine the status of the program operation by using DQ7 or DQ6. Refer
to the Write Operation Status section for information on these status bits.
A “0” cannot be programmed back to a “1.” Attempting to do so causes the device to set DQ5
= 1 (halting any further operation and requiring a reset command). A succeeding read shows
that the data is still “0.” Only erase operations can convert a “0” to a “1.”
Any commands written to the device during the Embedded Program Algorithm are ignored
except the Program Suspend command.
Secured Silicon Sector, Autoselect, and CFI functions are unavailable when a program oper-
ation is in progress.
A hardware reset immediately terminates the program operation and the program command
sequence should be reinitiated once the device has returned to the read mode, to ensure data
integrity.
Programming is allowed in any sequence and across sector boundaries for single word pro-
gramming operation.
During programming, any command (except the Suspend Program command) is ignored.
The Secured Silicon Sector, Autoselect, and CFI functions are unavailable when a program op-
eration is in progress.
Table 15.1
IL
, and OE# to V
for the required bus cycles and
A d v a n c e
S71WS-Nx0 Based MCPs
IL
, and OE# to V
IH
when writing commands or programming data.
I n f o r m a t i o n
IH
when providing an address to the device, and
Figure 10.3
for the flowchart.
S71WS-N_01_A4 September 15, 2005
(Table
10.8).

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