s71ws256nc0bawa30 Meet Spansion Inc., s71ws256nc0bawa30 Datasheet - Page 47

• Manufacturer Part Number: s71ws256nc0bawa30
• Description: Stacked Multi-chip Product Mcp 256/512/128 Megabit 32m/16m/8m X 16 Bit Cmos 1.8 Volt-only Simultaneous Read/write, Burst-mode Flash Memory With 128/64megabit 8m/4m X 16-bit Psram.
• Manufacturer: Meet Spansion Inc.

September 15, 2005 S71WS-N_01_A4
10.5.8
Cycle
1
2
3
Unlock Bypass
The device features an Unlock Bypass mode to facilitate faster word programming. Once the de-
vice enters the Unlock Bypass mode, only two write cycles are required to program data, instead
of the normal four cycles.
This mode dispenses with the initial two unlock cycles required in the standard program command
sequence, resulting in faster total programming time. The “Command Definition Summary” sec-
tion shows the requirements for the unlock bypass command sequences.
During the unlock bypass mode, only the Read, Unlock Bypass Program and Unlock Bypass Reset
commands are valid. To exit the unlock bypass mode, the system must issue the two-cycle unlock
bypass reset command sequence. The first cycle must contain the bank address and the data 90h.
The second cycle need only contain the data 00h. The bank then returns to the read mode.
The following are C source code examples of using the unlock bypass entry, program, and exit
functions. Refer to the Spansion Low Level Driver User’s Guide (available soon on www.amd.com
and www.fujitsu.com) for general information on Spansion Flash memory software development
guidelines.
The ACC pin must not be left floating or unconnected; inconsistent behavior of the device may
result.
ACC locks all sector if set to V
Entry Command
Description
A d v a n c e
Unlock
Unlock
Table 10.19 Software Functions and Sample Code
I n f o r m a t i o n
S71WS-Nx0 Based MCPs
Operation
Write
Write
Write
IL
; ACC should be set to V
Base + AAAh
Base + 554h
Base + AAAh
Byte Address
Word Address
Base + 555h
Base + 2AAh
Base + 555h
IH
for all other conditions.
00AAh
0055h
0020h
Data
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