s71ws256nc0bawa30 Meet Spansion Inc., s71ws256nc0bawa30 Datasheet - Page 43
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s71ws256nc0bawa30
Manufacturer Part Number
s71ws256nc0bawa30
Description
Stacked Multi-chip Product Mcp 256/512/128 Megabit 32m/16m/8m X 16 Bit Cmos 1.8 Volt-only Simultaneous Read/write, Burst-mode Flash Memory With 128/64megabit 8m/4m X 16-bit Psram.
Manufacturer
Meet Spansion Inc.
Datasheet
1.S71WS256NC0BAWA30.pdf
(188 pages)
- Current page: 43 of 188
- Download datasheet (4Mb)
September 15, 2005 S71WS-N_01_A4
Notes:
1.
2.
No
See
See the section on DQ3 for information on the sector erase timeout.
PASS. Device returns
Table 15.1
to reading array.
DQ3 = 1?
Poll DQ3.
Yes
for erase command sequence.
Yes
No
Write Sector Erase Cycles:
Sector Address, Data 30h
Address 555h, Data AAh
Address 2AAh, Data 55h
Address 555h, Data AAh
Address 555h, Data 80h
Perform Write Operation
Address 2AAh, Data 55h
Write Unlock Cycles:
Sector Addresses
(see Figure 10.6)
Status Algorithm
Write Additional
(Recommended)
A d v a n c e
Wait 4 µs
Additional
DQ5 = 1?
Sectors?
Done?
Yes
Select
Yes
No
Yes
FAIL. Write reset command
to return to reading array.
Last Sector
Selected?
I n f o r m a t i o n
No
No
Figure 10.5 Sector Erase Operation
S71WS-Nx0 Based MCPs
• Each additional cycle must be written within t
• Timeout resets after each additional cycle is written
• The host system may monitor DQ3 or wait t
• No limit on number of sectors
• Commands other than Erase Suspend or selecting
Unlock Cycle 1
Unlock Cycle 2
Command Cycle 1
Command Cycle 2
Command Cycle 3
Specify first sector for erasure
Status may be obtained by reading DQ7, DQ6 and/or DQ2.
Error condition (Exceeded Timing Limits)
acceptance of erase commands
additional sectors for erasure during timeout reset device
to reading array data
SEA
SEA
to ensure
timeout
41
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