s71ws256nc0bawa30 Meet Spansion Inc., s71ws256nc0bawa30 Datasheet - Page 148

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s71ws256nc0bawa30

Manufacturer Part Number
s71ws256nc0bawa30
Description
Stacked Multi-chip Product Mcp 256/512/128 Megabit 32m/16m/8m X 16 Bit Cmos 1.8 Volt-only Simultaneous Read/write, Burst-mode Flash Memory With 128/64megabit 8m/4m X 16-bit Psram.
Manufacturer
Meet Spansion Inc.
Datasheet
34 Pin Description
35 Power Up Sequence
146
After applying V
MRS# high. This gets the device into power up mode. Wait 200 µs minimum to get into the normal
operation mode. During power up mode, the standby current cannot be guaranteed. To obtain
stable standby current levels, at least one cycle of active operation should be implemented re-
gardless of wait time duration. To obtain appropriate device operation, be sure to follow the
proper power up sequence.
1.
2.
I/O0-I/O15
Pin Name
A0-A22
WAIT#
MRS#
ADV#
WE#
V
V
CS#
OE#
UB#
LB#
CLK
V
V
Apply power.
Maintain stable power (V
CCQ
SSQ
CC
SS
Address 0
Data Inputs / Outputs
Upper Byte (I/O
Lower Byte (I/O
Valid Data Indicator
I/O Ground Source
CC
Mode Register set
Voltage Source
Voltage Source
Ground Source
Output Enable
Address Valid
Write Enable
Chip Select
up to minimum operating voltage (1.7V), drive CS# high first and then drive
Function
Clock
Address 22
8
0
A d v a n c e
S71WS-Nx0 Based MCPs
15
7
CC
)
)
min.=1.7V) for a minimum 200 µs with CS# and MRS# high.
Input/Output
Output
Power
Power
Input
GND
GND
Type
I n f o r m a t i o n
Commands are referenced to CLK
Valid Address is latched by ADV falling edge
MRS# low enables Mode Register to be set
CS# low enables the chip to be active
CS# high disables the chip and puts it
into standby mode
OE# low enables the chip to output the data
WE# low enables the chip to
start writing the data
UB# (LB#) low enables upper byte
(lower byte) to start operating
Valid addresses input when ADV is low
Mode setting input when MRS is low
Depending on UB# or LB# status, word (16-bit,
UB#, and LB# low) data, upper byte (8-bit, UB#
low & LB# high) data or lower byte (8-bit, LB# low,
and UB# high) data is loaded
Core Power supply
I/O Power supply
Core ground Source
I/O Ground Source
WAIT# indicates whether data is valid or not
Description
S71WS-N_01_A4 September 15, 2005

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