ata6616 ATMEL Corporation, ata6616 Datasheet - Page 72

• Manufacturer Part Number: ata6616
• Description: Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
• Manufacturer: ATMEL Corporation

4.7
4.7.1
4.7.1.1
72
System Control and Reset
ATA6616/ATA6617 [Preliminary]
Reset
Resetting the AVR
• Bit5 - PRLIN: Power Reduction LIN / UART controller
Writing a logic one to this bit shuts down the LIN by stopping the clock to the module. When
waking up the LIN again, the LIN should be re initialized to ensure proper operation.
• Bit 4 - PRSPI: Power Reduction Serial Peripheral Interface
If using debugWIRE On-chip Debug System, this bit should not be written to one.
Writing a logic one to this bit shuts down the Serial Peripheral Interface by stopping the clock to
the module. When waking up the SPI again, the SPI should be re initialized to ensure proper
operation.
• Bit 3 - PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1
is enabled, operation will continue like before the shutdown.
• Bit 2 - PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module in synchronous mode (AS0
is 0). When the Timer/Counter0 is enabled, operation will continue like before the shutdown.
• Bit 1 - PRUSI: Power Reduction USI
Writing a logic one to this bit shuts down the USI by stopping the clock to the module. When
waking up the USI again, the USI should be re-initialized to ensure proper operation.
• Bit 0 - PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down.
The analog comparator cannot use the ADC input MUX when the ADC is shut down.
During reset, all I/O Registers are set to their initial values, and the program starts execution
from the Reset Vector. The instruction placed at the Reset Vector must be an RJMP – Relative
Jump – instruction to the reset handling routine. If the program never enables an interrupt
source, the Interrupt Vectors are not used, and regular program code can be placed at these
locations. The circuit diagram in
“RESET Characteristics” on page 270
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The time-out
period of the delay counter is defined by the user through the SUT and CKSEL Fuses. The dif-
ferent selections for the delay period are presented in
Figure 4-16
defines the electrical parameters of the reset circuitry.
shows the reset circuit. Tables in
DRAFT
Section 4.5.2 “Clock Sources” on page
Section 4.23.5
9132A–AUTO–10/08
50.