ata6616 ATMEL Corporation, ata6616 Datasheet - Page 238

• Manufacturer Part Number: ata6616
• Description: Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
• Manufacturer: ATMEL Corporation

4.19.1.3
4.19.2
4.19.2.1
238
ATA6616/ATA6617 [Preliminary]
Analog Comparator Inputs
DIDR0 – Digital Input Disable Register 0
Analog Compare Positive Input
• Bit 2 – ACIC: Analog Comparator Input Capture Enable
When written logic one, this bit enables the input capture function in Timer/Counter1 to be trig-
gered by the Analog Comparator. The comparator output is in this case directly connected to the
input capture front-end logic, making the comparator utilize the noise canceler and edge select
features of the Timer/Counter1 Input Capture interrupt. When written logic zero, no connection
between the Analog Comparator and the input capture function exists. To make the comparator
trigger the Timer/Counter1 Input Capture interrupt, the ICIE1 bit in the Timer Interrupt Mask
Register (TIMSK1) must be set.
• Bits 1, 0 – ACIS1, ACIS0: Analog Comparator Interrupt Mode Select
These bits determine which comparator events that trigger the Analog Comparator interrupt. The
different settings are shown in
Table 4-61.
Note:
• Bits 7,6 – AIN1D, AIN0D: AIN1D and AIN0D Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding Analog Compare
pin is disabled. The corresponding PIN register bit will always read as zero when this bit is set.
When an analog signal is applied to the AIN0/1 pin and the digital input from this pin is not
needed, this bit should be written logic one to reduce power consumption in the digital input
buffer.
It is possible to select any of the inputs of the ADC Positive Input Multiplexer to replace the pos-
itive input to the Analog Comparator. The ADC multiplexer is used to select this input, and
consequently, the ADC must be switched off to utilize this feature. If the Analog Comparator
Multiplexer Enable bit (ACME in ADCSRB register) is set and the ADC is switched off (ADEN in
ADCSRA register is zero), MUX[4..0] in ADMUX register select the input pin to replace the posi-
tive input to the Analog Comparator, as shown in
If ACME is cleared or ADEN is set, AIN1 pin is applied to the positive input to the Analog
Comparator.
Bit
Read/Write
Initial Value
ACIS1
0
0
1
1
When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be disabled by
clearing its Interrupt Enable bit in the ACSR Register. Otherwise an interrupt can occur when the
bits are changed.
ADC7D /
ACIS1 / ACIS0 Settings
AIN1D
R/W
7
0
ACIS0
0
1
0
1
ADC6D /
AIN0D
R/W
6
0
Interrupt Mode
Comparator Interrupt on Output Toggle.
Reserved
Comparator Interrupt on Falling Output Edge.
Comparator Interrupt on Rising Output Edge.
Table
ADC5D
R/W
5
0
4-61.
ADC4D
R/W
4
0
DRAFT
Table
ADC3D
R/W
3
0
4-62.
ADC2D
R/W
2
0
ADC1D
R/W
1
0
ADC0D DIDR0
R/W
0
0
9132A–AUTO–10/08