ata6616 ATMEL Corporation, ata6616 Datasheet - Page 65

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ata6616

Manufacturer Part Number
ata6616
Description
Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
Manufacturer
ATMEL Corporation
Datasheet

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4.5.5.4
9132A–AUTO–10/08
DRAFT
CLKSELR - Clock Selection Register
• Bits 3:0 – CLKC3:0: Clock Control Bits 3 - 0
These bits define the command to provide to the ‘Clock Switch’ module. The special write proce-
dure must be followed to change the CLKC3..0 bits
Change Enable” on page
Interrupts should be disabled when setting CLKCSR register in order not to disturb the
procedure.
Table 4-14.
• Bit 7– Res: Reserved Bit
This bit is reserved bit in the ATtiny167 and will always read as zero.
• Bit 6 – COUT: Clock Out
The COUT bit is initialized with ~(CKOUT) Fuse bit.
The COUT bit is only used in case of ‘CKOUT’ command. Refer to
Buffer” on page 56
In case of ‘Recover System Clock Source’ command, COUT it is not affected (no recovering of
this setting).
• Bits 5:4 – CSUT1:0: Clock Start-up Time
CSUT bits are initialized with the values of SUT Fuse bits.
In case of ‘Enable/Disable Clock Source’ command, CSUT field provides the code of the clock
start-up time. Refer to subdivisions of
clock start-up times.
In case of ‘Recover System Clock Source’ command, CSUT field is not affected (no recovering
of SUT code).
Clock Command
No command
Disable clock source
Enable clock source
Request for clock
Clock source switch
Recover system clock source code
Enable watchdog in automatic reload mode
CKOUT command
No command
Bit
Read/Write
Initial Value
1. Write the Clock Control Change Enable (CLKCCE) bit to one and all other bits in
2. Within 4 cycles, write the desired value to CLKCSR register while clearing CLKCCE bit.
CLKCSR to zero.
Clock Command List
R
7
0
-
availability
for using.
~ (CKOUT)
COUT
fuse
R/W
6
64.).
CSUT1
ATA6616/ATA6617 [Preliminary]
R/W
5
SUT1..0
fuses
Section 4.5.2 “Clock Sources” on page 50
CSUT0
R/W
4
CSEL3
R/W
3
(See ”Bit 7 – CLKCCE: Clock Control
CSEL2
R/W
2
CKSEL3..0
fuses
Section 4.5.2.7 “Clock Output
CSEL1
R/W
1
CSEL0
R/W
0
CLKC3..0
0001
0010
0100
0110
1xxx
0000
0011
0101
0111
for code of
CLKSELR
b
b
b
b
b
b
b
b
b
65

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