ata6616 ATMEL Corporation, ata6616 Datasheet - Page 161

• Manufacturer Part Number: ata6616
• Description: Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
• Manufacturer: ATMEL Corporation

4.13.11.4
4.13.11.5
4.13.11.6
4.13.11.7
9132A–AUTO–10/08
DRAFT
Timer/Counter1 Control Register D – TCCR1D
Timer/Counter1 – TCNT1H and TCNT1L
Output Compare Register A – OCR1AH and OCR1AL
Output Compare Register B – OCR1BH and OCR1BL
• Bit 7:4 – OC1Bi: Output Compare Pin Enable for Channel B
The OC1Bi bits enable the Output Compare pins of Channel B as shown in
146.
• Bit 3:0 – OC1Ai: Output Compare Pin Enable for Channel A
The OC1Ai bits enable the Output Compare pins of Channel A as shown in
146.
The two Timer/Counter I/O locations (TCNT1H and TCNT1L, combined TCNT1) give direct
access, both for read and for write operations, to the Timer/Counter unit 16-bit counter. To
ensure that both the high and low bytes are read and written simultaneously when the CPU
accesses these registers, the access is performed using an 8-bit temporary high byte register
(TEMP). This temporary register is shared by all the other 16-bit registers.
Registers” on page 136.
Modifying the counter (TCNT1) while the counter is running introduces a risk of missing a com-
pare match between TCNT1 and one of the OCR1A/B Registers.
Writing to the TCNT1 Register blocks (removes) the compare match on the following timer clock
for all compare units.
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNT1). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC1A/B pin.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
OC1BX
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
OC1BW
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
OC1BV
ATA6616/ATA6617 [Preliminary]
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
OC1BU
R/W
R/W
R/W
OCR1A[15:8]
OCR1B[15:8]
R
TCNT1[15:8]
4
0
4
0
4
OCR1A[7:0]
0
4
OCR1B[7:0]
0
TCNT1[7:0]
OC1AX
R/W
R/W
R/W
R
3
0
3
0
3
0
3
0
OC1AW
R/W
R/W
R/W
R
2
0
2
0
2
0
2
0
OC1AV
R/W
R/W
R/W
R
1
0
1
0
1
0
1
0
See “Accessing 16-bit
Figure 4-49 on page
Figure 4-49 on page
OC1AU TCCR1D
R/W
R/W
R/W
R
0
0
0
0
0
0
0
0
TCNT1H
TCNT1L
OCR1AH
OCR1AL
OCR1BH
OCR1BL
161