ata6616 ATMEL Corporation, ata6616 Datasheet - Page 40

• Manufacturer Part Number: ata6616
• Description: Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
• Manufacturer: ATMEL Corporation

DRAFT
Timing diagrams for instruction fetch and execution are presented in
Section 4.3.6 “Instruction
Execution Timing” on page
36.
Figure 4-7.
Program Memory Map
Program Memory
0x0000
Flash end
4.4.2
SRAM Data Memory
Figure 4-8
shows how the ATtiny167 SRAM Memory is organized.
The ATtiny167 is a complex microcontroller with more peripheral units than can be supported
within the 64 locations reserved in the Opcode for the IN and OUT instructions. For the
Extended I/O space in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
The data memory locations address both the Register File, the I/O memory, Extended I/O mem-
ory, and the internal data SRAM. The first 32 locations address the Register File, the next 64
location the standard I/O memory, then 160 locations of Extended I/O memory, and the next
locations address the internal data SRAM (see “ISRAM size” in
Table 4-2 on page
39).
The five different addressing modes for the Data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register
File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O Registers, 160 Extended I/O Registers and the
internal data SRAM in the ATtiny167 are all accessible through all these addressing modes. The
Register File is described in
Section 4.3.4 “General Purpose Register File” on page
34.
ATA6616/ATA6617 [Preliminary]
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