ata6616 ATMEL Corporation, ata6616 Datasheet - Page 48

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ata6616

Manufacturer Part Number
ata6616
Description
Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
Manufacturer
ATMEL Corporation
Datasheet

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4.4.5.4
4.4.5.5
4.4.5.6
4.5
4.5.1
48
System Clock and Clock Options
ATA6616/ATA6617 [Preliminary]
Clock Systems and their Distribution
General Purpose I/O Register 2 – GPIOR2
General Purpose I/O Register 1 – GPIOR1
General Purpose I/O Register 0 – GPIOR0
The ATtiny167 provides a large number of clock sources. They can be divided into two catego-
ries: internal and external. Some external clock sources can be shared with the asynchronous
timer. After reset, the clock source is determined by the CKSEL Fuses. Once the device is run-
ning, software clock switching is possible to any other clock sources.
Hardware controls are provided for clock switching management but some specific procedures
must be observed. Clock switching should be performed with caution as some settings could
result in the device having an incorrect configuration.
Figure 4-10
clocks may not need to be active at any given time. In order to reduce power consumption, the
clocks to modules not being used can be halted by using different sleep modes or by using fea-
tures of the dynamic clock switch circuit (See
Modes” on page 66
below.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
presents the principal clock systems in the AVR and their distribution. All of the
GPIOR27 GPIOR26 GPIOR25 GPIOR24 GPIOR23 GPIOR22 GPIOR21 GPIOR20
GPIOR17 GPIOR16 GPIOR15 GPIOR14 GPIOR13 GPIOR12 GPIOR11 GPIOR10
GPIOR07 GPIOR06 GPIOR05 GPIOR04 GPIOR03 GPIOR02 GPIOR01 GPIOR00
R/W
R/W
R/W
7
0
7
0
7
0
and
R/W
R/W
“Dynamic Clock Switch” on page
R/W
6
0
6
0
6
0
R/W
R/W
R/W
5
0
5
0
5
0
R/W
R/W
R/W
4
0
4
0
4
0
DRAFT
Section 4.6 “Power Management and Sleep
R/W
R/W
R/W
3
0
3
0
3
0
56). The clock systems are detailed
R/W
R/W
R/W
2
0
2
0
2
0
R/W
R/W
R/W
1
0
1
0
1
0
R/W
R/W
R/W
0
0
0
0
0
0
9132A–AUTO–10/08
GPIOR2
GPIOR1
GPIOR0

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