ata6616 ATMEL Corporation, ata6616 Datasheet - Page 144

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ata6616

Manufacturer Part Number
ata6616
Description
Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
Manufacturer
ATMEL Corporation
Datasheet

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4.13.7.1
4.13.7.2
4.13.7.3
4.13.8
144
ATA6616/ATA6617 [Preliminary]
Compare Match Output Unit
Force Output Compare
Compare Match Blocking by TCNT1 Write
Using the Output Compare Unit
In non-PWM Waveform Generation modes, the match output of the comparator can be forced by
writing a one to the Force Output Compare (FOC1A/B) bit. Forcing compare match will not set
the OCF1A/B flag or reload/clear the timer, but the OC1A/Bi pins will be updated as if a real
compare match had occurred (the COM1A/B1:0 bits settings define whether the OC1A/Bi pins
are set, cleared or toggled - if the respective OCnxi bit is set).
All CPU writes to the TCNT1 Register will block any compare match that occurs in the next timer
clock cycle, even when the timer is stopped. This feature allows OCR1A/B to be initialized to the
same value as TCNT1 without triggering an interrupt when the Timer/Counter clock is enabled.
Since writing TCNT1 in any mode of operation will block all compare matches for one timer clock
cycle, there are risks involved when changing TCNT1 when using any of the Output Compare
channels, independent of whether the Timer/Counter is running or not. If the value written to
TCNT1 equals the OCR1A/B value, the compare match will be missed, resulting in incorrect
waveform generation. Do not write the TCNT1 equal to TOP in PWM modes with variable TOP
values. The compare match for the TOP will be ignored and the counter will continue to 0xFFFF.
Similarly, do not write the TCNT1 value equal to BOTTOM when the counter is downcounting.
The setup of the OC1A/B should be performed before setting the Data Direction Register for the
port pin to output. The easiest way of setting the OC1A/B value is to use the Force Output Com-
pare (FOC1A/B) strobe bits in Normal mode. The OC1A/B Register keeps its value even when
changing between Waveform Generation modes.
Be aware that the COM1A/B1:0 bits are not double buffered together with the compare value.
Changing the COM1A/B1:0 bits will take effect immediately.
The Compare Output mode (COM1A/B1:0) bits have two functions. The Waveform Generator
uses the COM1A/B1:0 bits for defining the Output Compare (OC1A/B) state at the next compare
match. Secondly the COM1A/B1:0 and OCnxi bits control the OC1A/Bi pin output source.
4-49
ting. The I/O Registers, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the
general I/O port control registers (DDR and PORT) that are affected by the COM1A/B1:0 and
OCnxi bits are shown. When referring to the OC1A/B state, the reference is for the internal
OC1A/B Register, not the OC1A/Bi pin. If a system reset occur, the OC1A/B Register is reset to
“0”.
shows a simplified schematic of the logic affected by the COM1A/B1:0 and OCnxi bit set-
DRAFT
9132A–AUTO–10/08
Figure

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