p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 92
p2125vps20
Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.P2125VPS20.pdf
(700 pages)
- Current page: 92 of 700
- Download datasheet (5Mb)
Section 2 CPU
2.9
2.9.1
To use the TAS instruction, use registers ER0, ER1, ER4, and ER5.
The TAS instruction is not generated by the Renesas Technology H8S and H8/300 series C/C++
compilers. When the TAS instruction is used as a user-defined intrinsic function, registers ER0,
ER1, ER4, and ER5 should be used.
2.9.2
Since the ER7 register is used as the stack pointer in an STM/LDM instruction, it cannot be used
as a register that allows save (STM) or restore (LDM) operation. Two to four registers can be
saved/restored by single STM/LDM instruction. Available registers are listed below.
The STM/LDM instruction with ER7 is not created by the Renesas Technology H8S or H8/300
series C/C++ compilers.
2.9.3
The BSET, BCLR, BNOT, BST, and BIST instructions read data in byte units, manipulate the
data of the target bit, and write data in byte units. Special care is required when using these
instructions in cases where a register containing a write-only bit is used or a bit is directly
manipulated for a port.
In addition, the BCLR instruction can be used to clear the flag of the internal I/O register. In this
case, if the flag to be cleared has been set to 1 by an interrupt processing routine, the flag need not
be read before executing the BCLR instruction.
Rev. 1.00 Sep. 21, 2006 Page 54 of 658
REJ09B0310-0100
Two: ER0 and ER1, ER2 and ER3, ER4 and ER5
Three: ER0 to ER2, ER4 to ER6
Four: ER0 to ER3
Usage Notes
Note on TAS Instruction Usage
Note on STM/LDM Instruction Usage
Note on Bit Manipulation Instructions
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