p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 149
p2125vps20
Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.P2125VPS20.pdf
(700 pages)
- Current page: 149 of 700
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Table 6.2 shows the bus specifications for the basic bus interface of each area.
Table 6.2
Note:
6.4.2
The external address space is initialized as the basic bus interface and a 3-state access space. In
on-chip ROM enable extended mode, the address space other than on-chip ROM, on-chip RAM,
internal I/O registers, and their reserved areas is specified as the external address space. The on-
chip RAM and its reserved area are enabled when the RAME bit in SYSCR is set to 1. The on-
chip RAM and its reserved area are disabled and corresponding addresses are the external address
space when the RAME bit is cleared to 0.
6.4.3
The external address space is initialized as the basic bus interface and a 3-state access space. In
on-chip ROM disable extended mode, the address space other than on-chip RAM and internal I/O
registers is specified as the external address space. In on-chip ROM enable extended mode, the
address space other than on-chip ROM, on-chip RAM, internal I/O registers, and their reserved
areas is specified as the external address space. The on-chip RAM area is enabled when the
RAME bit in SYSCR is set to 1, and disabled and specified as the external address space when the
RAME bit is cleared to 0.
ABW
0
1
*
AST
—
0
1
Advanced Mode
Normal Mode
Other than WMS1 = 0 and WMS0 = 1
Bus Specifications for Basic Bus Interface
WMS1
—
—
0
—*
WMS0
—
—
1
—*
WC1
—
—
—
0
1
WC0
—
—
—
0
1
0
1
Bus Width
Setting prohibited in this LSI
8
8
Rev. 1.00 Sep. 21, 2006 Page 111 of 658
Bus Specifications
Section 6 Bus Controller (BSC)
Number of
Access
States
2
3
3
REJ09B0310-0100
Number of
Program
Wait
States
0
0
0
1
2
3
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