p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 459

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
16.4.8
This LSI provides the DTC to allow continuous data transfer. The DTC is initiated when the IRTR
flag is set to 1, which is one of the two interrupt flags (IRTR and IRIC). When the ACKE bit is 0,
the ICDRE, IRIC, and IRTR flags are set at the end of data transmission regardless of the
acknowledge bit value. If the ACKE bit is 1, the ICDRE, IRIC, and IRTR flags are set when data
transmission is completed with the acknowledge bit value of 0, and if the ACKE bit is 1, only the
IRIC flag is set when data transmission is completed with the acknowledge bit value of 1.
When initiated, the DTC transfers specified number of bytes, clears the ICDRE, IRIC, and IRTR
flags to 0. Therefore, no interrupt is generated during continuous data transfer; however, if data
transmission is completed with the acknowledge bit value of 1 when the ACKE bit is 1, the DTC
is not initiated, thus allowing an interrupt to be generated if enabled.
When FS = 1 and FSX = 1 (clocked synchronous serial format)
(a) Data transfer ends with ICDRE=0 at transmission, or ICDRF=0 at reception.
(b) Data transfer ends with ICDRE=1 at transmission, or ICDRF=1 at reception.
SCL
SDA
IRIC
User processing
SCL
SDA
IRIC
User processing
Operation Using DTC
7
7
7
7
Figure 16.27 IRIC Setting Timing and SCL Control (3)
8
8
8
8
1
1
Clear IRIC
Clear IRIC
2
2
Write to ICDR (transmit)
or read from ICDR (receive)
Rev. 1.00 Sep. 21, 2006 Page 421 of 658
3
3
Section 16 I
2
1
4
1
C Bus Interface (IIC)
4
REJ09B0310-0100
Clear IRIC

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