p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 329
p2125vps20
Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.P2125VPS20.pdf
(700 pages)
- Current page: 329 of 700
- Download datasheet (5Mb)
13.7
If bits CKS2 to CKS0 in either TCR_Y or TCR_X are set to B'100, the 8-bit timers of the two
channels are cascaded. With this configuration, 16-bit count mode or compare-match count mode
can be selected by the settings of the CKSX and CKSY bits in TCRXY.
13.7.1
When bits CKS2 to CKS0 in TCR_Y are set to B'100 and the CKSY bit in TCRXY is set to 1, the
timer functions as a single 16-bit timer with TMR_Y occupying the upper eight bits and TMR_X
occupying the lower 8 bits.
(1)
• The CMF flag in TCSR_Y is set to 1 when an upper 8-bit compare-match occurs.
• The CMF flag in TCSR_X is set to 1 when a lower 8-bit compare-match occurs.
(2)
• If the CCLR1 and CCLR0 bits in TCR_Y have been set for counter clear at compare-match,
• The settings of the CCLR1 and CCLR0 bits in TCR_X are enabled, and the lower 8 bits of
(3)
• Control of output from the TMOY pin by bits OS3 to OS0 in TCSR_Y is in accordance with
• Control of output from the TMOX pin by bits OS3 to OS0 in TCSR_X is in accordance with
13.7.2
When bits CKS2 to CKS0 in TCR_X are set to B'100 and the CKSX bit in TCRXY is set to 1,
TCNT_X counts the occurrence of compare-match A for TMR_Y. TMR_X and TMR_Y are
controlled independently. Conditions such as setting of the CMF flag, generation of interrupts,
output from the TMO pin, and counter clearing are in accordance with the settings for each
channel.
only the upper eight bits of TCNT_Y are cleared. The upper eight bits of TCNT_Y are also
cleared when counter clear by the TMRIY pin has been set.
TCNT_X can be cleared by the counter.
the upper 8-bit compare-match conditions.
the lower 8-bit compare-match conditions.
Setting of compare-match flags
Counter clear specification
Pin output
TMR_Y and TMR_X Cascaded Connection
16-Bit Count Mode
Compare-Match Count Mode
Rev. 1.00 Sep. 21, 2006 Page 291 of 658
Section 13 8-Bit Timer (TMR)
REJ09B0310-0100
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