p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 395

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
15.7
Table 15.10 shows the interrupt sources in serial communication interface. A different interrupt
vector is assigned to each interrupt source, and individual interrupt sources can be enabled or
disabled using the enable bits in SCR.
When the TDRE flag in SSR is set to 1, a TXI interrupt request is generated. When the TEND flag
in SSR is set to 1, a TEI interrupt request is generated. A TXI interrupt can activate the DTC to
allow data transfer. The TDRE flag is automatically cleared to 0 at data transfer by the DTC.
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated. When the ORER,
PER, or FER flag in SSR is set to 1, an ERI interrupt request is generated. An RXI interrupt can
activate the DTC to allow data transfer. The RDRF flag is automatically cleared to 0 at data
transfer by the DTC.
A TEI interrupt is requested when the TEND flag is set to 1 while the TEIE bit is set to 1. If a TEI
interrupt and a TXI interrupt are requested simultaneously, the TXI interrupt has priority for
acceptance. However, note that if the TDRE and TEND flags are cleared simultaneously by the
TXI interrupt routine, the SCI cannot branch to the TEI interrupt routine later.
Table 15.10 SCI Interrupt Sources
Channel
0
1
Interrupt Sources
Name
ERI0
RXI0
TXI0
TEI0
ERI1
RXI1
TXI1
TEI1
Receive error
Receive data full
Transmit data empty
Transmit end
Receive error
Receive data full
Transmit data empty
Transmit end
Interrupt Source
TDRE
TEND
TDRE
TEND
Interrupt Flag
ORER, FER, PER
RDRF
ORER, FER, PER
RDRF
Section 15 Serial Communication Interface (SCI)
Rev. 1.00 Sep. 21, 2006 Page 357 of 658
DTC Activation
Not possible
Possible
Possible
Not possible
Not possible
Possible
Possible
Not possible
REJ09B0310-0100
Priority
High
Low

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