p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 105

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
4.1
As table 4.1 indicates, exception handling may be caused by a reset, interrupt, direct transition, or
trap instruction. Exception handling is prioritized as shown in table 4.1. If two or more exceptions
occur simultaneously, they are accepted and processed in order of priority.
Table 4.1
Priority
High
Low
Exception Handling Types and Priority
Exception Type
Reset
Interrupt
Direct transition
Trap instruction
Exception Types and Priority
Section 4 Exception Handling
Start of Exception Handling
Starts when execution of the current instruction or exception
Started by execution of a trap (TRAPA) instruction. Trap
Starts immediately after a low-to-high transition of the RES
pin, or when the watchdog timer overflows.
handling ends, if an interrupt request has been issued.
Interrupt detection is not performed on completion of ANDC,
ORC, XORC, or LDC instruction execution, or on
completion of reset exception handling.
Starts when a direct transition occurs as the result of
SLEEP instruction execution.
instruction exception handling requests are accepted at all
times in the program execution state.
Rev. 1.00 Sep. 21, 2006 Page 67 of 658
Section 4 Exception Handling
REJ09B0310-0100

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