p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 526
p2125vps20
Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.P2125VPS20.pdf
(700 pages)
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Section 19 Flash Memory (0.18-µm F-ZTAT Version)
Table 19.6 System Clock Frequency for Automatic-Bit-Rate Adjustment by This LSI
(2)
The overview of the state transition diagram after boot mode is initiated is shown in figure 19.8.
1. Bit rate adjustment
2. Waiting for inquiry set command
3. Automatic erasure of all user MATs and user boot MATs
4. Waiting for programming/erasing command
Note that memory read of the user MAT or user boot MAT can only read out the programmed
data after all user MATs or user boot MATs have been automatically erased.
Rev. 1.00 Sep. 21, 2006 Page 488 of 658
REJ09B0310-0100
Bit Rate of Host
4,800 bps
9,600 bps
19,200 bps
After boot mode is initiated, the bit rate of the SCI interface is adjusted with that of the host.
For inquiries about the user MAT size and configuration, MAT start address, and support state,
the required information is transmitted to the host.
After inquiries have finished, all user MATs and user boot MATs are automatically erased.
When the program preparation notice is received, the state for waiting for program data is
When the erasure preparation notice is received, the state for waiting for erase-block data is
There are many commands other than programming/erasing. For example, sum check,
State Transition Diagram
entered. The programming start address and program data must be transmitted following
the programming command. When programming is finished, the programming start address
must be set to H'FFFFFFFF and transmitted. Then the state of program data wait is
returned to the state of programming/erasing command wait.
entered. The erase-block number must be transmitted following the erasing command.
When the erasure is finished, the erase-block number must be set to H'FF and transmitted.
Then the state of erase-block data wait is returned to the state of programming/erasing
command wait. This erasing operation should be used in a case where after programming
has been executed in boot mode, a specific block is to be reprogrammed without a reset
start. When programming can be executed by only one operation, since all blocks are
erased before entering the state for waiting for a programming/erasing/other command, the
erasing operation is not required.
blank check (erasure check), and memory read of the user MAT and user boot MAT, and
acquisition of current status information.
System Clock Frequency for Automatic-Bit-Rate Adjustment by This LSI
8 to 20 MHz
8 to 20 MHz
8 to 20 MHz
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