p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 23

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Figures
Section 1 Overview
Figure 1.1 Block Diagram .............................................................................................................. 3
Figure 1.2 Pin Assignments (SDIP-64) .......................................................................................... 4
Figure 1.3 Pin Assignments (QFP-64)............................................................................................ 5
Figure 1.4 Pin Assignments (TQFP-80) ......................................................................................... 6
Section 2 CPU
Figure 2.1 Exception Vector Table (Normal Mode)..................................................................... 21
Figure 2.2 Stack Structure in Normal Mode ................................................................................. 21
Figure 2.3 Exception Vector Table (Advanced Mode)................................................................. 22
Figure 2.4 Stack Structure in Advanced Mode ............................................................................. 23
Figure 2.5 Memory Map............................................................................................................... 24
Figure 2.6 CPU Internal Registers ................................................................................................ 25
Figure 2.7 Usage of General Registers ......................................................................................... 26
Figure 2.8 Stack............................................................................................................................ 27
Figure 2.9 General Register Data Formats (1).............................................................................. 30
Figure 2.9 General Register Data Formats (2).............................................................................. 31
Figure 2.10 Memory Data Formats............................................................................................... 32
Figure 2.11 Instruction Formats (Examples) ................................................................................ 45
Figure 2.12 Branch Address Specification in Memory Indirect Addressing Mode ...................... 49
Figure 2.13 State Transitions ........................................................................................................ 53
Section 3 MCU Operating Modes
Figure 3.1 Address Map (1).......................................................................................................... 64
Figure 3.2 Address Map (2).......................................................................................................... 65
Section 4 Exception Handling
Figure 4.1 Reset Sequence (Mode 2)............................................................................................ 70
Figure 4.2 Stack Status after Exception Handling ........................................................................ 72
Figure 4.3 Operation when SP Value Is Odd................................................................................ 73
Section 5 Interrupt Controller
Figure 5.1 Block Diagram of Interrupt Controller........................................................................ 76
Figure 5.2 Block Diagram of Interrupts IRQ7 to IRQ0 ................................................................ 84
Figure 5.3 Block Diagram of Interrupt Control Operation ........................................................... 88
Figure 5.4 Flowchart of Procedure up to Interrupt Acceptance in Interrupt Control Mode 0....... 91
Figure 5.5 State Transition in Interrupt Control Mode 1 .............................................................. 92
Figure 5.6 Flowchart of Procedure up to Interrupt Acceptance in Interrupt Control Mode 1....... 94
Figure 5.7 Interrupt Exception Handling ...................................................................................... 96
Rev. 1.00 Sep. 21, 2006 Page xxiii of xxxviii