p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 605
p2125vps20
Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.P2125VPS20.pdf
(700 pages)
- Current page: 605 of 700
- Download datasheet (5Mb)
Bit
6
5
4
3 to 0
Bit Name
LSON
NESEL
EXCLE
Initial
Value
0
0
0
All 0
R/W Description
R/W Low-Speed On Flag
R/W Noise Elimination Sampling Frequency Select
R/W Subclock Input Enable
R/W Reserved
Specifies the operating mode to be entered after executing the
SLEEP instruction. This bit also controls whether to shift to
high-speed mode or subactive mode when watch mode is
cancelled.
When the SLEEP instruction is executed in high-speed mode
or medium-speed mode:
0: Shifts to sleep mode, software standby mode, or watch
1: Shifts to watch mode or subactive mode
When the SLEEP instruction is executed in subactive mode:
0: Shifts directly to watch mode or high-speed mode
1: Shifts to subsleep mode or watch mode
When watch mode is cancelled:
0: Shifts to high-speed mode
1: Shifts to subactive mode
Selects the frequency by which the subclock (φSUB) input from
the EXCL pin is sampled using the clock (φ) generated by the
system clock pulse generator.
0: Sampling using φ/32 clock
1: Sampling using φ/4 clock
Enables or disables subclock input from the EXCL pin.
0: Disables subclock input from the EXCL pin
1: Enables subclock input from the EXCL pin
The initial value should not be changed.
mode
Rev. 1.00 Sep. 21, 2006 Page 567 of 658
Section 22 Power-Down Modes
REJ09B0310-0100
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